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Seminar Easics

Logo EasicsEasics (www.easics.com) invites you to a seminar about the state-of-the art design of embedded systems. Participants can get to know Easics in an informal way and see what it is to work at Easics. The seminar will take place on Wednesday March 5th at 17h00 in the offices of Easics (walking distance from ESAT): Wetenschapspark Arenberg, Gaston Geenslaan 9, Heverlee.

During the seminar, the activities of Easics will be presented along with how they work based on 2 case-studies:

Afterwards there is a reception with snacks and drinks where there can be further discussions. The end of the event is estimated around 19h00.

The seminar is aimed at senior year students master in elektronics (all options) an computer sciences and PhD students elektronics and computer sciences that are interested in the design of embedded digital systems (ASIC, SOC, FPGA), using high level modelling.

The event is open, but registering is required. Send an email with subject "seminarie" to before Thursday February 28th.

Info about Easics: http://www.easics.com/jobs
Recent interview: http://www.easics.com/jobs/bits_chips.pdf